[PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images

[Tan, Ley Foon]

> -----Original Message-----
> From: Marek Vasut <marex at denx.de>
> Sent: Wednesday, August 5, 2020 4:23 PM
> To: Ang, Chee Hong <chee.hong.ang at intel.com>; u-boot at lists.denx.de
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>; Tom Rini
> <trini at konsulko.com>; See, Chin Liang <chin.liang.see at intel.com>; Tan, Ley
> Foon <ley.foon.tan at intel.com>; Chee, Tien Fong
> <tien.fong.chee at intel.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim at intel.com>
> Subject: Re: [PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp
> with 4 SPL images
> 
> On 8/5/20 10:15 AM, Chee Hong Ang wrote:
> > Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required
> > for booting up Cyclone5/Arria10.
> >
> > Signed-off-by: Chee Hong Ang <chee.hong.ang at intel.com>
> > ---
> >  Makefile | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/Makefile b/Makefile
> > index 2629a74..13429a0 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
> FORCE
> > ifneq ($(CONFIG_ARCH_SOCFPGA),)  quiet_cmd_socboot = SOCBOOT $@
> >  cmd_socboot = cat	spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
> > -			spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
> > -			u-boot.img > $@ || rm -f $@
> > +			spl/u-boot-spl.sfp \
> > +			spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \
> > +	      cat	spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@
> 
> Isn't that what the existing code does already ?
> 
> Also, this will I think fail on 128k erase block size NAND due to missing
> padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images, each SPL image size is 256KB.
So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have problem for 128KB erase size NAND.

Regards
Ley Foon