Pull request: u-boot-riscv/master 20200825

[Tom Rini]

On Tue, Aug 25, 2020 at 10:31:04AM +0800, uboot at andestech.com wrote:

> Hi Tom,
> 
> Please pull some riscv updates:
> 
> - Sipeed Maix support S-mode.
> - Provide command sbi.
> - Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
> - Fix a compiler error with CONFIG_SPL_SMP=n.
> - Fix sifive ram driver 32 compiler warnings.
> - Fix kendryte/pll.h redefine nop() warning.
> 
> Thanks
> Rick
> 
> https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/720564636
> 
> The following changes since commit 1aa3966173fe92fa3c46638ee8eb8b8491f521d6:
> 
>   Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk (2020-08-24 09:06:02 -0400)
> 
> are available in the Git repository at:
> 
>   git at gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
> 
> for you to fetch changes up to c92b50a44b95e706b9c0c97544bd7504fe6d36e9:
> 
>   cmd: provide command sbi (2020-08-25 09:34:47 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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