[U-Boot] [PATCH] Add NanoBone board support

Mark Jackson mpfj-list at newflow.co.uk
Fri Apr 19 22:58:28 CEST 2013


On 16/04/13 16:48, Tom Rini wrote:
> On Tue, Apr 16, 2013 at 04:02:34PM +0100, Mark Jackson wrote:

<snip>

>> +	config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data,
>> +		   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
> 
> And are you unable to run at 400MHz here?  Or just weren't aware /
> having tried updating the timing parameters, etc?

Forgive my ignorance, but where does the 400MHz come from ?

I thought that 303MHz was the max clock speed on the AM335x (TRM
7.3.2.2), or am I missing something ?

Cheers
Mark J.


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